Adding binary numbers is a very simple task. The rules (addition tables) for binary addition using two bits are shown in Fig. 8-1. The first three rules are obvious. Rule 4 says that, in binary, 1 + 1 = 10 (decimal 2). The 1 in the sum must be carried to the next column as in regular decimal addition.

Two sample binary addition problems are shown below:

It is now possible to design a gating circuit that will perform addition. Looking at the left two columns of Fig.1 reminds one of a two-variable truth table. The binary rules are reproduced in truth table form in Fig. 3. The inputs to be added are given the letters A and B. The sum output is often given the summation symbol (∑). The carry-out output column is often just represented with the Co symbol.

The truth table in Fig. 3 is that of a half adder circuit. A block diagram for a half adder might be drawn as in Fig. 4a. Note the two inputs A and B on the symbol in Fig. 4a. The outputs are labeled ∑ (sum) and Co (carry out). It is common to label the half adder with HA as shown on the block symbol.

Looking at the sum (∑) output column of the truth table in Fig. 3, note that it takes an XOR function to produce the ∑ output. The carry-out column will use an AND function. A complete logic circuit for the half adder with two inputs (A and B) and two outputs (∑ and Co) is shown in Fig. 4b. Composed only of gates (XOR and AND), the half adder is classified as a combinational logic circuit.

Consider the binary addition problem in Fig. 5a. The Is column is 1 + 1, and it follows rule 4 in Fig. 1. The sum is 0 with a carry of 1 to the 2s column. The 2s column must now be added. In the 2s column we have 1 + 1 + 1. This is a new situation. It equals binary 11 (decimal 3). The 1 is placed below the 2s column in the sum position. A 1 is carried to the 4s column. The single 1 at the top of the 4s column is added to the Os with a result of 1, which is written in the sum position. The result is a sum of 110.

Rule 5 for binary addition is formally written in Fig. 4/5. Note the three inputs (A, B, and carry in). The outputs are the usual sum and carry out. Rule 5 suggests that a half adder will not work if a carry-in situation arises. Half adders will add only two inputs (A and B), as in the Is column of an addition problem. When the 2s column or the 4s column is added, a new circuit is needed. The new circuit is called a full adder. A block diagram of a full adder is shown in Fig. 6a.

The full adder circuit has three inputs which are added. The inputs shown in the block diagram in Fig. 6 are A, B, and On (carry in). The outputs from the full adder are the customary ∑ (sum) and Co (carry out). Note the use of the letters FA to symbolize full adder in the block diagram. To repeat, the half adder is used in only the Is place when larger binary numbers are added. Full adders are used for adding all other columns (2s, 4s, 8s, and so forth).

A full adder circuit can be constructed from half adders and an OR gate. A full adder circuit is diagrammed in Fig. 6b. The half adder becomes a basic building block in constructing other adders. A truth table for the full adder is detailed in Fig. 7.

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